(Legally required notice - I work for Dell)
Regarding Surviving on Stack Exchange Sites
I'm not entirely sure what's wrong with your initial question other than asking about home builds is discouraged and the R720 is out of production.
However on your answer: If you're looking to survive the initial rep grind of any Stack Exchange site, removing emotion or extraneous comments from your answers goes a long way. We have a phrase we used to use in my military days, "Calling fire on one's own position." Saying, "Asked ChatGPT and the answer was very specific and without any arrogance." is very much a comment that falls into the category of "Calling fire on one's own position." Would avoid that as it's a one way ticket to downvote town.
Regarding Your Answer
ChatGPT appears to have lied and I suspect your usage of ChatGPT is part of the reason you're getting downvoted. While ServerFault does not have an official policy, there is a reason SO does ban ChatGPT: https://stackoverflow.com/help/gpt-policy. It is a fantastic tool, it's important to know how generative AI works. The TLDR version is it's just summarizing things it has seen before and there is no guarantee it is fully accurate as is the case here. Here is the R720's channel organization:
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The chart in the manual is formatted strangely so here it is a bit more clearly. A slots go to proc one and B slots go to proc 2.
Processor 1 |
Channel 0 |
Channel 1 |
Channel 2 |
Channel 3 |
Slots |
A1 (white), A5 (black), A9 (green) |
A2 (white), A6 (black), A10 (green) |
A3 (white), A7 (black), A11 (green) |
A4 (white), A8 (black), A12 (green) |
Processor 2 |
Channel 0 |
Channel 1 |
Channel 2 |
Channel 3 |
Slots |
B1 (white), B5 (black), B9 (green) |
B2 (white), B6 (black), B10 (green) |
B3 (white), B7 (black), B11 (green) |
B4 (white), B8 (black), B12 (green) |
Taking a look at part of what you have in your answer: you put dual ranked DIMMs in slot A1 which is on processor 1 channel 0 and a single ranked DIMM in slot A5 which is also on proc 1 channel 0.
To understand why this is problematic read the next section.
Necessary Background
What's important here is to understand how memory works. For starters, what is a memory channel? It's the physical line going out to the bank. I'm guessing whatever proc you have in there is either Sandy Bridge or Ivy Bridge in which case they have 4 channels per proc with three DIMMs per bank as described here
Note: I'm going to explain this next part at a comparatively high level. In reality, it gets more complicated the further down you go, but this is generally how it works.
The reason the processor family matters is that you have to know how it is actually going to push data out to your DIMMs. Assuming you haven't changed the behavior in the BIOS, it should by default interleave the data between the DIMMs. I'm not sure on a server that old, but usually there will be an interleave size - let's call it 128 bytes. This means that if you're going to write 512 bytes of data what the memory controller would actually do is first write 128 bytes to channel 0, then 128 bytes to channel 1, channel 2, then channel 3. This happens so that when you go to retrieve that 512 bytes you can do a single access against each channel and there is no contention on any one channel.
So what really matters is the access patterns and memory requirements of your specific workload. If you have no idea what your application workload looks like then you would default to balancing the config.
The Answer
This brings us to what is wrong with what you're suggesting in your answer. What the manual says is a bit different than what you have, "In a dual-processor configuration, the memory configuration for each processor should be identical. For example, if you populate socket A1 for processor 1, then populate socket B1 for processor 2, and so on." That is to say, the memory configuration should be balanced.
Let me say that no one is ever going to recommend mixing dual and single rank DIMMs in a production environment. Given that the server in question is old I assume this is probably a personal project in which case it's fine.
The problem is your configuration is balanced but it mixes differently ranked DIMMs in the same channel. Interleaving works independently for each channel but when you mix ranks in the same channel wonky things start to happen. The exact behavior varies by processor but in general, interleaving performance will degrade because it's going to have to deal with the incongruity in the ranks within the same interleave access. Different ranks typically means different access latencies, plus the corresponding difference in size, which causes problems because generally interleaving will stripe the data across the DIMMs in the bank.
So there are multiple correct answers here, but whatever you do, you should make sure that both procs are identical, and that in any given channel that channel has DIMMs with the same rank.
TLDR Me
There are multiple correct answers here, but whatever you do, you should make sure that both procs are identical, and that in any given channel that channel has DIMMs with the same rank.